Following the GlobalFoundries Technology Conference, there is a lot of confusion on the status of Silicon-on-Insulator (SOI) processing nodes before the arrival of Fully-Depleted Extra-Thin SOI with the 14nm process.
GlobalFoundries silicon manufacturing nodes in 2012, 2013 and 2014: 32nm, 28nm, 20nm. Note that 32nm (currently used for SOI silicon) and 28nm carry the same suffix: Super High Performance
There are rumors that AMD will not go the 22nm route Intel is taking since GlobalFoundries is taking the 28nm, 20nm to 16 and 14nm nodes. Out of these four, we knew that 28nm and 16nm were bulk silicon, leaving these as a no-go option for the AMD processors.
Also, there was confusion with the 20nm node, with Gregg Bartlett and Ajit Manoche initially stating that they are not going to use the SOI at 20nm and that the decision was made purely for "business reasons". After our initial story, we received word from GlobalFoundries and SOITEC that decision to go SOI or remain bulk is not made by the foundry, but the semiconductor company has to license the technology from IBM and that decision is made on case-by-case basis. Read: you want SOI, you pay IBM to use it and then GF can make it.
In 2013, AMD will introduce 28nm Processors – 20-core Terramar Die-shrink codenamed Dublin and 10-core Sepang die-shrink called Macau
According to the roadmap (pictured above), you can see that AMD will introduce 28nm Server processors, clearly not following Intel with the 22nm node in 2013. We guesstimate that AMD will take the 28nm (SOI? Bulk?), 20nm (SOI? Bulk?) and then go for advanced 14nm ETSOI route. The successor of Bobcat i.e. Ontario/Zacate low-power Fusion APUs could end on an 16nm "half-node", depending on decisions made by GlobalFoundries and TSMC.
AMD recently gained a lot of experience with bulk silicon on the CPU side of things, with the company now producing millions of x86 processors per quarter using bulk silicon on TSMC’s 40nm process. Then again, the investment made in first SOI GPU isn’t a small one – since the same APU can save over 30% in power consumption when SOI is used.
The future of silicon manufacturing at 14nm: Multi-gate FinFET, Extra Thin SOI, Packaging, III-IV and Germanium channels
At the end of the day, regardless of what the decision with 28nm and 20nm will be, the industry is heading for abandonment of current copper interconnects and will go for photonics. For that technology, everybody will need to go SOI, as Intel demonstrated back in 2006 with the Silicon Photonics concept.