ARM (ARM Holdings) and TSMC (Taiwan Semiconductor Manufacturing Company) announced they had taped out the first 20nm ARM Cortex-A15 MP Core processor. The two companies completed the implementation from RTL-to-tape-out in six months using TSMC?s open innovation platform (OIP) 20nm design ecosystem.
ARM and TSMC used the Cadence RTL-to-sign-off design flow to develop the 20nm test chip. ARM and Cadence have been working together for 18 months on the test chip fabrication processes. Neither company said how long it will take to develop successful production-ready 20nm silicon. There was nothing in the announcement saying whether the test chip design was for a single processor, or the multi-core processor which will go into tablets, desktops, and high-end smartphones.
ARM said they will optimize its physical IP technology to specific TSMC 20nm process technologies for power, performance and area (PPA), driving the specification of the Cortex-A15 processor optimization pack (POP). TSMC says their 20nm process provides more than a two times performance increase over preceding generations.
AMD Cortex-A15 offers significant performance boost over Cortex-A9
Mike Inglis, Executive Vice President and General Manager, Processor Division, ARM said: "We value the work carried out between ARM, TSMC and its design ecosystem partners to achieve this milestone. It is a strong testimonial of our mutual commitment to provide industry leading technology for advanced node designs. The combination of TSMC technology, the latest ARM Cortex-A15 processor and Artisan physical IP will help meet the increasing demand for high performance, energy-efficient consumer devices."
Suk Lee, Director, Design Infrastructure Marketing Division at TSMC said: "The tape out of this ARM Cortex-A15 processor is another good example of closer and tighter collaboration between TSMC and its ecosystem partners such as ARM and Cadence."
GlobalFoundries is also a partner with Cadence and ARM. However, they seem to be at least one generation behind TSMC’s 20nm node. Earlier this year GlobalFoundries was talking up their non-SOI 20nm process and the separate SOI node developed by Soitec, all draining the available resources. That test chip is supposed to be ready by 1H 2012. TSMC uses the planar process and said they would possibly look at SOI for their 14nm node. Remember, 14nm is the node when Fully Depleted SOI debuts, enabling ultra-fast interconnects (Silicon Photonics) and even lower power than it is today.
ARM and Cadence recently signed a multi-year technology agreement that will provide ARM engineering teams with ongoing access to Cadence products. ARM and Cadence are working to ensure that both the ARM processors and the Cadence design flows are optimized to work together. This is another major step forward for TSMC, after their Qualcomm S4 launch. The competition bar is clearly being raised prior to next week’s ARM TechCon 2011 conference in Silicon Valley.