GlobalFoundries emphasized collaboration at the GTC 2010 Conference. Starting with that theme, a breakfast for attendees was sponsored by five Gold Partners. Food always makes a hit at these conferences and the fare at the Santa Clara Convention Center was excellent.
The five companies we should thank for their hospitality were: TCI, Infotech, ChipEstimate.com, Socle, and VeriSilicon. Of these, three partners offer design services. Infotech provides concept to silicon to prototype solutions for ASIC/FPGA
engineering and embedded software development. They develop proprietary design flows in silicon engineering across the design cycle for both digital and mixed signal semiconductor products. They are a large organization with 7,600 engineers in 30 global locations. VeriSilicon Holdings
is an integrated circuit design foundry for custom solutions and system-on-chip
[SoC] turnkey services. They have four R&D centers, two in China and two in the US. Their solutions combine licensable digital signal processing [DSP] software compatible cores, from low cost ZSP neo to ultra high performance ZSP 600; eDRAM and a value-added mixed signal IP portfolio. Socle Technology
provides proprietary SoC design and implementation platforms addressing the 90nm, 65nm and 40nm process nodes. They help customers overcome obstacles in ultra deep submicron SoC design. GlobalFoundries, as of June 2008 became a major shareholder.
Among the Gold Partners, EDA tools are offered by ChipEstimate.com
, a chip planning portal made up of more than 200 of the largest intellectual property [IP] suppliers and foundries. The ChipEstimate community has performed over 100,000 chip estimations. Cadence Design Systems which supports the EDA360 vision with digital and custom IC design platforms, is their proprietor. True Circuits, Inc.
[TCI] develops and markets a broad range of timing IP with state of the art circuits. They have a complete family of high quality, low-jitter and standardized PLLs and DLLs in a range of frequencies, multiplication factors, sizes and functions in TSMC
and Common Platform
processes from 180nm to 40nm.
As breakfast time drew to a close, entertainment took the form of a Lion Dance
with intense and rhythmic drumming throughout the exhibit area, meant to draw the crowds to the auditorium for the main presentation. GlobalFoundries CEO, Doug Grose, opened the day by saying the lion signifies a new beginning – the split off of GlobalFoundries from AMD. The host speakers went on to explain the significance of their existing, and under construction facilities. The multiple foundries in Singapore, Germany, and the upcoming New York unit assure customers of a secure supply of product. Interestingly, towards this end, emphasis was placed on the political stability of the location sites.
Morning speakers included Chekib Akrout, Senior VP at AMD who spoke on CPU/GPU dynamics and technologies; Gregg Bartlett, Senior VP at GlobalFoundries, spoke of raising the bar to 28nm and beyond, which is the direction of their NY foundry; Jean-Marc Chery, Executive VP and CTO of STMicroelectronics
spoke of 28nm collaborative R&D and global multi-fab manufacturing in a delightful French accent. GlobalFoundries vice presidents Norman Armour and Raj Kurnar closed the morning looking at global capacities and automated precision manufacturing.
The afternoon was filled with an EDA and IP executive forum of top people from GlobalFoundries, Mentor Graphics, Synopsys, ARM, and Cadence. Luigi Capodieci, Director of CAD Design Engineering closed the day exploring new frontiers and innovations in design and manufacturing of 28nm and below. The folks involved in the New York unit kept referring to 20nm, so the next question is "How Low Can You Go?"
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