According to a report at CPU World, Intel quietly began shipping a special Xeon DP SKU
to server OEMs. Last year Intel provided test samples of the chip with clocks ranging from 4GHz to 4.66GHz. At press time, the chips were not officially announced and chances are they never will be. The chip dubbed Xeon X5698 is clocked at a blistering 4.4GHz, features 12MB of L3 cache but comes only with two cores. 32nm Westmere-EP die: Six physical cores, each has 256KB of L2 cache (top block) and 12MB of L3 cache (located below). Fastest shipping part: 3.46GHz.
The CPUs appear to be based on the Gulftown (Westmere-EP
) chip, which features six cores on the silicon die. This assumption is based on the fact that the CPUs feature the same amount of L3 cache. It seems unlikely for Intel to deploy a dedicated chip mask for such a potentially low volume SKU. It's an interesting thing once you consider Intel could use all chips with only some cores defective from these lines as dual-core chips, provided they satisfy the required criteria.Intel Xeon X5698: 4.4GHz clock and 130W TDP was achieved by disabling four cores, leaving 12MB of L3 cache for only two processing cores.
The clock speeds are the highest to date in a shipping x86 product. Due to power issues neither x86 manufacturer managed to release a CPU clocked higher than 3.80GHz. We assume it is required to operate these CPUs at a slightly higher voltage than lower clocked quad- and sexa-core offerings. Since the high-clocked Xeons feature only two active cores, it's possible for Intel to deliver these clocks inside the 130W thermal envelope. Do note that there are higher-clocked products on the market, meaning this is not the fastest clocked piece of silicon. IBM's POWER6
offerings are available at clock speeds up to 5GHz, though this is a different architecture and the chips are allowed to dissipate 200 watts of heat and even more.
The question that remains is what applications these CPUs are aimed for. We can figure (legacy) applications that need the single-threaded performance boost, which can't make use of multiple cores. For example if you are constantly compiling source code, this can save some development time. Another example would be a (web-)service that needs to serve only a small number of users, but these users need to be served very fast. In such a scenario the higher clocks reduce the compute latency of sequential tasks.
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