Intel Manufacturing Event in Munich: 22nm Breakthrough Analyzed

Recently, Intel made a big announcement about a breakthrough they made in semiconductor manufacturing technology. Intel proudly presented their new Tri-Gate transistor - also dubbed 3D transistor - which is going to be deployed in the upcoming 22nm process technology. We were invited by Intel to Munich, Germany to see the presentation and then discuss the subject with Intel's executives and representatives.


On the Left: Conventional Planar Transistor; Tri-Gate Transistor on the Right

Key part of the announcement was the usage of a so called Tri-Gate transistor. In comparison to previous planar transistors, a vertical fin allows conducting channels to form on three sides. In order to improve drive strength multiple connected fins can be employed. This technology is used on top of Intel's previous silicon innovations like SiGe Strained Silicon first introduced at the 90nm node and High-k Metal Gate which debuted at the 45nm node.


Intel's Transistor Leadership over generations: 90nm, 65nm, 45nm, 32nm and now 22nm. Three major inventions: SiGe, HKMG and Tri-Gate

Of course it wouldn't be Intel if there weren't a statement from co-founder and Chairman Emeritus Gordon Moore:

"For years we have seen limits to how small transistors can get. This change in the basic structure is a truly revolutionary approach, and one that should allow Moore's Law, and the historic pace of innovation, to continue."

 

It is important to understand, that the technology Intel announced yesterday will solely be used to improve performance characteristics of the transistors. The 22nm process will enable a 2x increase in feature density, which is exactly what previous full-node steps yielded at Intel. So the Tri-Gate transistor will not affect density at all. At low voltages a 37% performance increase can be observed and a 50% reduction of power consumption at constant performance. The slide published by Intel shows that the Tri-Gate transistor especially improves operation at lower voltages. The weak grey curve in between is what a planar 22nm process would have yielded - according to Mark Bohr a sub 20% gain in performance/efficiency. Thus this innovation provides a performance improvement that is beyond what simple miniaturization would yield.



Tri-Gate Transistor enables lower voltages, resulting in lower power consumption than conventional 32nm Planar Transistor

From an economic standpoint, Intel touts a cost advantage of Tri-Gate transistors over SOI (Silicon-On-Insulator) which is used by GlobalFoundries for their Super High Performance processes, which are currently solely used to manufacture microprocessors for AMD. Both technologies allow the transistor to be fully depleted, which reduces leak currents. While SOI adds 10% additional cost to finished wafers, Tri-Gate only increases costs by 3% for the finished wafer. Intel said that the upgrades needed for their fabs to start manufacturing at 22nm are no more significant than previous technology transitions in the past. Intel said that starting 2011 five fabs will be equipped for 22nm volume production. That includes the D1C and D1D fabs in Oregon, Fab 12 and Fab 32 in Arizona and Fab 28 in Israel. While Intel doesn't disclose the order in which they will be upgraded, you can bet on the Oregon fabs being first since they are development fabs. Overall the technology announcement doesn't change any guidance given to the financial community.



Intel's 22nm-enabled facilities: five fabs in Oregon, Arizona and Israel.

Don't be fooled by the marketing spin of Intel PR representatives regarding whether they invented 3D transistors or not. During the event, representatives have been upfront, that the underlying ground work was done in cooperation with researchers of other industry heavyweights. But Intel is proud to announce that they are the first company who brings this technology to volume manufacturing of highly complex chips, which is surely no small feat. Indeed we inquired GlobalFoundries about this technology and they replied with "We don’t see the need for these technologies until beyond the 20nm generation." So don't expect 3D technology from GF to be introduced before the 14nm node. As an aside it should be noted that what Intel touts Tri-Gate transistors are generally known as FinFETs. Intel uses the different moniker to differentiate itself from the competition.