The Eighth Annual Flash Memory Summit
convenes this week at the Santa Clara Convention Center, Santa Clara, California. The hot topic focus
this year is on 3D NAND-Flash and next generation non-volatile memories.3D NAND-Flash Introduction
Samsung goes on record for being the first major producer to announce production status for their 128 Gbit NAND-Flash device. It was rather short on details - the expectation is that Samsung will be more forthcoming with detailed information this week at the Summit. Micron counter-announced that their 3D entry will be available in Q1 ’14.
A laundry list of issues has bubbled up with the newly announced 3D flash needing explanation. The technology switches from 'floating gate' to 'charge trapping' electron storage as the memory storage mechanism - implemented using SiO3 and SiN respectively as the semiconductor storage material. Silicon Nitride, long used as a passivation layer over CMOS semiconductor circuitry, was used earlier in EEPROM
in the 1980s and later by Spansion in their MirrorBit NOR-flash (2002).
A bewildering fact is the first 3D flash devices utilize retrograde geometry. That’s right – they’re going backwards to make it all work – setting off my “something is somehow wrong here” alarm. The explanation for retrograde geometry is due to SiN 'layering' using a larger geometry permits optimization of device 'cost effective' characteristics. 'Cost effective' is corporate speak for “we haven’t achieved our cost goals yet”.
The number of layers and the cell type is an even larger mystery. Currently at 24 no one has owned up to, whether they consist of SLC
or MLC (TLC is evidently out of the question at present). 3D NAND is in dire need of an improved roadmap story – or is this an unintended signal of yet another technology change in the near future abrogating the need for it? I have the impression that 3D Flash is not quite ready for a 'prime-time' production ramp – late 2014 to early 2015 is more likely. Oh, and a data sheet would be a nice touch…Effects of Consolidation
The semiconductor memory industry has consolidated down to four major producers of Flash and three of DRAM. Markets under such conditions come under oligopolistic control wherein competition is less intense; pricing stabilizes and technology change is constrained. Memory producers have suffered through the worst market highs and lows of any entity within the sector. The remaining producers, in their efforts to survive, have become averse to risk and go to great lengths in their R&D efforts to insure that any new technology will extend for the greatest number of generations possible to justify their rolling the dice one more time. On roll-out, this becomes the all important technology roadmap for the technology run.
The NAND-Flash roadmap is widely viewed as coming to an end – the technology has literally run out of room to store electrons. Reducing the areal component further reduces the number of electrons needed to determine a binary level. Noise, resistance, stray capacitance, leakage, nearest neighbor disturbs and manufacturing defects all combine against the data sheet guarantee. Designers must juggle an impossible number of parameters in their effort to find a producible solution. Out of options in the XY direction, they opted to go in the only other direction available, depth or the Z direction.Macroeconomics, 450 mm Wafer Fabs, EUV & The Fab Stall
Moore’s Law states “that the number of transistors on an integrated circuit doubles every two years” and has been consistent over the history of the semiconductor industry. It is important to the industry as it is used to guide long-term planning and to set targets for research and development.
The path supporting Moore’s Law has been historically paved with just-in-time larger wafer sizes and ever-decreasing lithography dimensions - until now. Costs for new fabs have increased to the point where producers need longer payback periods to balance the increased costs. As you have probably already guessed producers and for that fact, the entire semiconductor industry is a bit shy of sustaining Moore’s Law.
450 mm polysilicon ingots and fab equipment remain under development. Extreme Ultra-Violet lithography for sub 16 nm production use is still several years in the future - leaving producers with no real option for lowering cost currently and for several years in the future. In short, we are experiencing a stalling of Moore’s Law due to economics – call it a 'Fab Stall'. The knock-on effect of the Fab Stall will affect the entire ecosystem of the technology sector beyond just the semiconductor memory segment.Non-Volatile Next Generation
The memory industry is comfortable with the idea that Flash will phase out sometime in the next several years. Toshiba, SanDisk and SK Hynix have affirmed resistive RAM though the companies have moved the introductions around varying from next year to 2018 citing the lack of 450 mm wafer fabs and EUV lithography. They evidently believe that they can use 3D Flash to meet market demands until then.
CMOS Resistive RAM Feature Set:
•Standard CMOS fab process
•BEOL “bolt on/over” SoC
•Voltage & Geometry scaling below 10 nm
•Read/Write symmetry & Byte write
•0.5 X smaller cell than NAND
•10X endurance over NAND
•20X greater write performance over NAND
•20X lower power over NAND
•IP dates to around 1990
•Long term roadmap
The announcement last week by Crossbar Inc. is a direct hit on producer inability to show a roadmap for the next generation (this may change this week). Crossbar uses a silver chalcogenide resistive memory element technology similar to that developed by Adesto Technologies. They are not a producer and plan to license their technology – similar to Adesto’s strategy.
All producers have established R&D efforts developing next generation technologies. Internal politics and prior investments can and do sway decision matrices regarding which receives “most favored” status within each respective company. Another aspect is the heightened attention given to IP leakage – project information dissemination is highly controlled and protected. Details are not available until a formal release. BSN* Take
3D NAND-Flash is here! We believe it will take time for it to have any volume influence on the market; volume will most likely ramp in mid to late next year and to full market availability in 2015. We are not thrilled by any performance deltas thinking it will instead help prepare the producers for the next generation of non-volatile memory - we favor Resistive RAM as having the best long-term roadmap.
3D NAND-Flash has opened a window of opportunity and startup companies are coming to the fore offering to fill the “stall void” with high performance Resistive RAM.
The idea of “Never Off” Terra-Byte Main Memory seems closer than it did a month ago…
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