AMD Shows Next Gen Chips: Bulldozer and 1st and 2nd Generation Fusion
9/2/2010 by: John Oram
Chekib Akrout, senior VP of the AMD Technology Group, kicked off the first customer talk at GlobalFoundries' ill-named GTC 2010 conference and told us more about their Llano Fusion technology. Then Akrout popped the first photo on the screen of a future "Orochi" die which will have eight cores.
AMD 32nm Orochi Octo-Core die, Bulldozer Architecture
Sorry for the poor image quality. Click on over to PC Perspective for better view of the die. Orochio will have eight cores, and four modules, all based on the Bulldozer architecture. This will be built on a 32nm HKMG node using 300mm SOI [Silicon-On-Insulator] wafers at Fab 1 in Dresden, Germany. Akrout said to expect Orochi as soon as fourth quarter 2011, meaning AMD's internal roadmap slipped from second to fourth quarter - another six month delay in delivering octo-core Bulldozer-based part to the market. In our conversation with AMD's execs, we were told that Orochi will also be the base for second generation Fusion part coming after Llano, which is now in test production.
Since GTC 2010 was a GlobalFoundries show, Akrout skipped over Ontario. Ontario is the code name for the Bobcat-based Fusion part which integrates a dual core low-power processor with an 80-core DirectX 11 graphics portion, but is manufactured in 40nm process over at TSMC, GlobalFoundries lead competitor.
AMD Llano Die: First Fusion APU Features four STARS [K10.5] CPU cores and 480-core Redwood DirectX 11 GPU
Akrout explained that Llano is based on STARS [K10.5] quad-core CPU and manufactured on GlobalFoundries 32nm SOI/HKMG process. Llano will have an integrated PCIe 2.0 controller, a dual channel DDR3-1600 memory controller, and 1MB L2 cache per core [no L3 cache]. As you can see on the image above, place where L3 cache used to be is now occupied by 480-core GPU [we could call it Redwood plus Cedar, i.e. 400 plus 80 Core]. Llano will be offered in 2.5W - 25W power consumption versions, 0.8V – 1.3V [voltage] and at target clock-speeds of over 3.0GHz. The cores will dynamically scale their clock-speeds and voltages within the designated thermal design power in order to boost performance when a program does not require all four processing engines or trim power consumption when there is no demand for resources.
Global Foundries CEO, Doug Grose, said that yields on the 32nm wafers were not up to production levels. He admitted that is an area Fab 1 is working on.
Later, we will have more about ARM's announcements.
AMD, GlobalFoundries, Chekib Akrout, Technology Group, GTC 2010, GlobalFoundries Technology Conference, Orochi, Ontario, Llano, Bulldozer, Bobcat, Fusion, 32nm, Fab 1, Dresden, Germany, Doug Grose, STARS, K10.5, SoC, HKMG, High-K Metal Gate, GPU, GPGPU, CPU,
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